USC SDR, an easy-to-program, high data rate, real time software radio platform.

ABSTRACTWe present USC SDR, a wireless platform designed for easy-to-program, high data rate, real time wireless experimentation. The design of our platform aims at removing most of the bottlenecks encountered in the design of current software radio architectures, e.g. the requirement to program new schemes in an FPGA, and the difficulty to run real-time experiments for a long time. The architecture combines generic PCI FPGA development boards with radio front-ends built as self-sufficient daughterboards. The daughterboards are connected to the FPGAs, which in turn are plugged into the PCIE slots of a general-purpose server. Interestingly, the connection of the daughterboards to the FPGA cards is implemented through a standard FMC (FPGA Mezzanine Card) interface, such that the same RF front-end can be reused with future FPGA generations. In this way, USC SDR is not limited to a specific FPGA choice and does not require a complete re-design in order to accommodate for future more powerful FPGAs. The hardware is supported by a real-time software architecture where signal processing tasks, PHY and MAC layer algorithms can be programmed as user-level applications. As an example, we will showcase a massive MIMO testbed built using a single server with multiple PCIE slots.