AC-RMT: A fault-tolerance SMT architecture based on asynchronous checkpoint

In existing redundant multithreading (RMT) architectures, master threads have to wait for slave threads for comparison at some positions, which may delay the release of rename register file. The quantitative analysis presented in the paper shows that the rename register file is one of the important resources affecting the performance. In order to avoid the waiting of master threads, an asynchronous checkpoint-based redundant multithreading (AC-RMT) architecture is proposed. In such a RMT architecture, two contexts saving rooms are set aside for each thread, one for detecting faults and the other for saving the last checkpoint used for fault restoration, so resources can be released timely. Experiments show that AC-RMT can boost performance more efficiently with lower overhead than that of register value queue free recovery (RVQ_F) scheme. © 2011.