Triple Patterning Lithography Aware Optimization and Detailed Placement Algorithms for Standard Cell-Based Designs.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2016)
Abstract
Triple patterning lithography (TPL) is regarded as a promising technique to handle the manufacturing challenges in the 14nm technology node and beyond. It is necessary to consider TPL in early design stages to make the layout more TPL friendly and reduce the manufacturing cost. In this paper, we propose a flow to co-optimize cell layout decomposition and detailed placement. Our cell decomposition ...
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Key words
Layout,Standards,Rails,Law,Algorithm design and analysis,Lithography
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