300-V class power n-channel LDMOS transistor implemented in 0.18-μm silicon-on-insulator (SOI) technology

A SOI platform is developed for a LDMOS transistor from 70V to 300V. It is one of the best cases covering the wide voltage range. By applying novel DTI technology, the pitch of a single LDMOS transistor cell is reduced. Thin silicon and oxide film help to reduce the process complexity and the cost of SOI wafer. The platform is compatible with standard CMOS technology, and is appreciable for broad power IC products.