回路面積を考慮したSuspicious Timing Error Prediction回路の挿入位置決定手法の改良と評価(タイミング設計手法,デザインガイア2014-VLSI設計の新しい大地-)
Distributed Computing（2014）
Key words
Delay Fault Testing,Fault Localization,Laser Voltage Probing,Time-Resolved Imaging,Failure Analysis
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