A high density cylinder-type MIM capacitor integrated with advanced 28nm logic High-K/Metal-Gate process for embedded DRAM
international symposium on vlsi technology, systems, and applications(2012)
Abstract
A cylinder-type Metal-Insulator-Metal (MIM) capacitor integrated with advanced 28nm logic High-K/Metal-Gate (HKMG) process for embedded DRAM has been developed. The stacked cell capacitor is formed using low temperature high-K dielectrics to achieve sufficient storage capacitance without significantly impacting logic transistors. This paper describes techniques to achieve cylinder-type MIM capacitor's capacitance >10fF/cell and keep the low leakage (<0.1fA/cell) requirements. The MIM dielectric reliability test passes Time Dependent Dielectric Breakdown (TDDB) lifetime (>10 years). The test vehicle is composed of 72 macros of 4.5Mb each. We successfully demonstrate fully functional good yield of 28nm eDRAM 324Mb test vehicle with access speed >330MHz.
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Key words
electrodes,logic circuits,logic design,capacitors,capacitance
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