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一种低压差+5 V三端电源的研制

胡永贵,蒲大勇,崔伟

MICROELECTRONICS（2002）

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Abstract
介绍了一种CMOS低压差+5 V三端稳压源.在电路设计上,将PMOS管作为调整管,采用带隙基准和NMOS基准两种结构,重点讨论了影响低压差电源的几个因素;在工艺上,采用硅栅自对准CMOS工艺,做出了100 mA时压差为0.3 V的+5 V三端电源.采用NMOS基准的三端稳压源,其静态电流和电源抑制比等参数优于采用带隙基准的三端稳压源.
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