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Modeling and analysis of vertical noise coupling between clock tree and channel routing wire in 3D mixed signal integration

Shiwei Wang,Yingtao Ding,Huanyu He,Jianqiang Lu

2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)（2015）

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Abstract
This paper reports on the vertical noise coupling between a clock wire in digital IC and channel routing wires in analog IC in 3D mixed signal integration. Full wave electromagnetic simulations are employed to evaluate the vertical noise coupling. The coupling mechanism is discussed with transfer impedance. Insights to vertical noise coupling between interconnects in 3D integration are offered and possible solutions are provided to reduce the noise.
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Key words
three-dimensional integrated circuits (3D-IC),vertical coupling noise,clock tree,channel routing wire,signal integrity
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