The Design of HD Image Rectification Architecture Using Floating Point IP

IERI Procedia(2014)

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摘要
This paper proposes a real-time HD stereo images rectification hardware design architecture in order to remove vertical parallax of images caused by distortion within the cameras and alignment between them. After calculating calibration parameters of images using Matlab Toolbox designed by J.Y Bouguet as a prior step for the above purpose, the researcher designed rectification hardware based on the algorithms of Heikkilä and Silven. When stereo cameras are installed, it becomes difficult to find corresponding points owing to geometric errors between the cameras. However, in case corresponding points are located in the same line in two images, corresponding points can be found only in the line and therefore calculation becomes simple and errors are reduced. The line where the corresponding points are situated is called an epipolar line. In order to make the lines become an epipolar line, geometric image transformation technique called rectification should be used. Here, in order to heighten precision of result images, the researcher employed a floating point calculator generated using a core generator of Xilinx. Through this, it was verified that rectification hardware which has higher precision than other rectification hardware designed using a look-up table and which operates on a real-time basis may be designed.
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关键词
Rectification,Stereo-matching,FPGA,Real-time implementation,Epipolar geometry ,
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