Impact Of Smt-Induced Edge Dislocation Positions To Nfet Performance

This work highlights the impact of SMT-induced edge-dislocation positions in nFET device design. Based on experimental results and atomic transport simulation, dislocations with reduced proximity and depth would increase the amount of SFs and TDs which induce high parasitic resistance and high I _boff leakage current together. Trade-off among strained mobility, parasitic resistance and I _boff should be made for advanced device design.