Design insights for reliable energy efficient OxRAM-based flip-flop in 28nm FD-SOI
2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)(2015)
Abstract
This paper investigates the design architecture and the optimum resistance state values for high-endurance, high-yield energy-efficient OxRAM-based non-volatile flip-flops (NVFF) for ultra-low power applications in 28nm FD-SOI. Silicon measurements demonstrate that a low programming current improves endurance, but at the expense of a reduced memory window (R
OFF
/R
ON
). Statistical analyses show that the scaling limitation of the NVFF operating voltage in restore mode can be overcome with a narrow memory window by using a current-based design solution. Low variability of the FD-SOI enables to operate down-to 0.7V with more than 10
8
of endurance cycles.
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Key words
statistical analyses,narrow memory window,ultra-low power applications,NVFF design architecture,optimum resistance state values,FD-SOI,reliable energy efficient OxRAM-based flip-flop,size 28 nm,Si
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