Fabrication Of 0.06 Mu M Poly-Si Gate Using Duv Lithography With A Designed Sixoynz Film As An Arc And Hardmask

We report fabrication of sub-0.1 mu m poly-Si gates using conventional DUV lithography with an optimized SixOyNz film. This film has dual functions: reducing substrate reflectivity to <1%, and serving as a hardmask for the poly-Si etch. With an aggressive etch bias process, linewidths down to 0.06 mu m are achieved with good linewidth control (3 sigma<12nm) and a near perfect linearity. Excellent optical uniformity of the n and k of the ARC is obtained with a manufacturable PECVD deposition process.