Impact Of An Lpt(Ii) Concept With Thin Wafer Process Technology For Igbt'S Vertical Structure
2009 21ST INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS(2009)
摘要
In this paper, for the first time, 600 similar to 6500 V IGBTs utilizing a new vertical structure of "Light Punch-Through (LPT) (II)" with Thin Wafer Process Technology demonstrate high total performance with low overall loss and high safety operating area (SOA) capability. This collector structure enables a wide position in the trade-off characteristics between on-state voltage (V-CE(sat)) and turn-off loss (E-OFF) without utilizing any conventional carrier lifetime technique. In addition, this device concept achieves a wide operating junction temperature (@218 similar to 423 K) of IGBT without the snap-back phenomena (<= 298 K) and thermal destruction (>= 398 K). From the viewpoint of the high performance of IGBT, the breaking limitation of any Si wafer size, the proposed LPT(II) concept that utilizes an FZ silicon wafer and Thin Wafer Technology is the most promising candidate as a vertical structure of IGBT for the any voltage class.
更多查看译文
关键词
diodes,carrier lifetime,voltage,temperature,igbt,silicon wafer,electric fields
AI 理解论文
溯源树
样例
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要