Reflective Electron-Beam Lithography Performance For The 10 Nm Logic Node

Maskless electron beam lithography has the potential to extend semiconductor manufacturing to the sub-10 nm technology node. KLA-Tencor is currently developing Reflective Electron Beam Lithography (REBL) for high-volume 10 nm logic (16 nm HP). This paper reviews progress in the development of the REBL system towards its goal of 100 wph throughput for High Volume Lithography (HVL) at the 2X and 1X nm nodes. In this paper we introduce the Digital Pattern Generator (DPG) with integrated CMOS and MEMs lenslets that was manufactured at TSMC and IMEC. For REBL, the DPG is integrated to KLA-Tencor pattern generating software that can be programmed to produce complex, gray-scaled lithography patterns. Additionally, we show printing results for a range of interesting lithography patterns using Time Domain Imaging (TDI).Previously, KLA-Tencor reported on the development of a Reflective Electron Beam Lithography (REBL) tool for maskless lithography at and below the 22 nm technology node(1). Since that time, the REBL team and its partners (TSMC, IMEC) have made good progress towards developing the REBL system and Digital Pattern Generator (DPG) for direct write lithography. Traditionally, e-beam direct write lithography has been too slow for most lithography applications. E-beam direct write lithography has been used for mask writing rather than wafer processing since the maximum blur requirements limit column beam current - which drives e-beam throughput. To print small features and a fine pitch with an e-beam tool requires a sacrifice in processing time unless one significantly increases the total number of beams on a single writing tool. Because of the continued uncertainty with regards to the optical lithography roadmap beyond the 22 nm technology node, the semiconductor equipment industry is in the process of designing and testing e-beam lithography tools with the potential for HVL.