Transistors for VLSI, for wireless: A view forwards through fog

2015 73rd Annual Device Research Conference (DRC)(2015)

Cited 3|Views47
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Abstract
With transistors approaching scaling limits, demonstrating a record device demands ∼20–40 process steps, many at extreme resolution. Facing this, how might a Ph.D. student steer the future of VLSI or of wireless systems? Beyond exploring yet more new channel materials, whether 2D or 3D, we explore below other options.
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Key words
VLSI transistors,low delay,low switching energy,small-area electronics,tunnel FET,TFET,steep transistors,barrier energy,WKB hand calculation,tunneling probability,source doping,multilayer electron antireflection coating,microwave impedance matching,size 2 nm
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