Integration Technology of 30nm Generation Multi-Level Nand Flash for 64gb Nand Flash Memory

Donghwa Kwak,Jaekwan Park,Keonsoo Kim,Yongsik Yim, Soojin Ahn,Yoonmoon Park,Jinho Kim,Woncheol Jeong, Jooyoung Kim,Mincheol Park, Byungkwan Yoo,Sangbin Song,Hyunsuk Kim,Jaehwang Sim,Sunghyun Kwon,Byungjoon Hwang, Hyung-Kyu Park,Sunghoon Kim, Yunkyoung Lee,Hwagyung Shin, Namsoo Yim,Kwangseok Lee,Minjung Kim,Youngho Lee,Jangho Park,Sangyong Park,Jaesuk Jung,Kinam Kim

2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS（2007）

Cited 79|Views63

Key words

generation multi-level NAND flash,NAND flash memory,breakthrough patterning technology,self aligned double patterning,lithography,hemi-cylindrical FET,HCFET,size 38 nm

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