Implementation Of A Software Defined Fm Mixed Demodulator On Fpga
2015 23RD TELECOMMUNICATIONS FORUM TELFOR (TELFOR)(2015)
摘要
Software defined radio (SDR) applications are usually preferred in low power flexible communication systems. In this paper, a software defined Frequency Modulation (FM) demodulator is presented. Mixed demodulation technique is used to build a digital FM demodulator which has 16 MHz sampling rate. Proposed system was implemented successfully on a Field Programmable Gate Array (FPGA). The system uses 1247 logic elements. FPGA's power consumption is 113.56 mW. The system was tested and verified with a test bed including Analog Digital Converter (ADC) and Digital Analog Converter (DAC).
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关键词
CORDIC,Digital FM,FPGA,SDR
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