Design and Process Simulation on High Voltage VDMOS
INSTRUMENTATION, MEASUREMENT, CIRCUITS AND SYSTEMS(2012)
Abstract
A VDMOS cell structure based on semiconductor physics and relevant states were designed. The process parameters of the high-voltage VDMOS have been calculated and ajusted. Using the optimal device' dimensions, the doping concentration was ananlyzed systematically. Additionally, a simulating model of VDMOS was compiled based on SENTAURUS PROCESS. According to this model simulation, an optimized device parameters' design was further determined. Finnally, the device drain-source breakdown voltage has satisfied a standard value of 1200V. Whereas its threshold voltage is 3.9V. which is in the prerequisite range of 3 similar to 5V.
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Key words
VDMOS,Breakdown voltage,ON-resistance,Sentaurus tcad
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