Silicidation Induced Strain Phenomena In Totally Silicided (Tosi) Gate Transistors

In this paper, we present a detailed analysis of the performance and transport characteristics in totally Ni silicided (TOSI) devices. For two different TOSI integration schemes, we study transconductance variations of TOSI devices with respect to poly-Si gated devices. We find a clear signature of process induced strain related to the total gate silicidation step which depends largely on the integration scheme used for the fabrication of the TOSI devices.