Integration of fine-pitched Through-Silicon Vias and Integrated Passive Devices

Electronic Components and Technology Conference(2011)

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摘要
This paper reports on a silicon interposer containing both Through-Silicon Vias [TSV] and Integrated Passive Devices [IPD]. The fine-pitched 30 mu m diameter x 100 mu m deep TSV connect the IPD on one side of the wafer with Re-Distribution Layer [RDL] metallization and solder bumps on the other. Such a platform provides great versatility for heterogeneous system integration and reduced form-factor packaging. Interposer manufacture is described and performance of integrated RF filters and resonators is assessed after reliability testing, including; high temperature stress, thermal cycling and accelerated stress test.
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关键词
integrated circuit packaging,form factor,stress testing,thermal cycling,silicon,through silicon via
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