2Mb SPRAM Design: Bi-Directional Current WriteandParallelizing-Di rection Current ReadSchemesBasedon Spin-Transfer TorqueSwitching
2007 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS(2007)
Abstract
A 1.8V 2-Mb SPRAM (SPin-transfer torque RAM) chip using 0.2-mu m logic process with MgO tunneling barrier cell demonstrates the circuit technologies for potential low power non-volatile RAM, or universal memory This chip features: an array scheme with bit-by-bit bi-directional current write to achieve proper spin-transfer torque writing of 100-ns, and parallelizing-direction current reading with low voltage bit-line that leads to 40-ns access time.
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Key words
spin-transfer torque, universal RAM, low power RAM, nonvolatile RAM, TMR
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