Ultra-fine pitch redistribution for 3D interposer

This study focuses on the development of a low cost and very fine pitch (8 mu m space/8 mu m line width) Redistribution Layer (RDL) for a 3D silicon interposer built on 300mm wafers, including a fine pitch-compatible conformal passivation. The first part of this paper describes the development of all the process steps involved in the conventional RDL build-up, with a focus on low temperature compatibility (<200 degrees C) required by process integration on thinned wafers bonded on temporary carriers. Integration flow includes copper RDL electroplated through a resist mask and a spin-coated polymer passivation. Indeed photosensitive polymer approach is investigated to reach very low passivation pitch. Critical dimensions of both RDL and passivation layers are evaluated together with passivation conformity on copper lines. In the second part, integration on a test vehicle and electrical results on dedicated patterns are discussed.