Thermally Stable, Sub-Nanometer Equivalent Oxide Thickness Gate Stack For Gate-First In0.53ga0.47as Metal-Oxide-Semiconductor Field-Effect-Transistors

Metal-oxide-semiconductor (MOS) capacitors were fabricated by depositing composite 2 nm HfO2/1 nm Al2O3/1 nm a-Si gate stacks on p-In0.53Ga0.47As/InP (001) substrates. Thanks to the presence of the Al2O3 barrier layer, a minimum amount of the a-Si passivating layer is oxidized during the whole fabrication process. The capacitors exhibit excellent electrical characteristics with scaled equivalent oxide thickness (EOT) of 0.89 nm and mid-gap interface state density of 5 x 10(11) eV(-1) cm(-2) upon post-metallization anneal up to 550 degrees C. Gate-first, self-aligned MOS field-effect-transistors were fabricated with a similar 5 nm HfO2/1 nm Al2O3/1 nm a-Si gate stack and raised source and drain (600 degrees C for 30 min). Owing to the excellent thermal stability of the stack, no degradation of the gate stack/semiconductor interface is observed, as demonstrated by the excellent capacitance vs voltage characteristics and the good mobility values (peak at 1030 cm(2) V-1 s(-1) and 740 cm(2) V-1 s(-1) at carrier density of 6.5 x 10(12) cm(-2)) for a 1.3 nm EOT. [doi:10.1063/1.3683472]