Efficient architectures for modulo 2n − 2 arithmetic units

International Journal of Electronics(2015)

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摘要
Moduli of the 2(n) and 2(n)+/- 1 forms are usually employed in designs that adopt the residue number system. However, in several cases such as in finite impulse response filters and communication components, a modulo value equal to 2(n)-2 can be used. So far, modulo 2(n)-2 arithmetic units have been based either on look-up tables or on generic modulo arithmetic units. In this work, by taking advantage of the properties of modulo 2(n)-2 arithmetic, we propose efficient modulo 2(n)-2 multi-operand adder, multiplier as well as squarer architectures. The proposed circuits are based on the corresponding ones for modulo 2(n)(-1)-1 arithmetic and some simple logic. Experimental results validate that the proposed circuits achieve significant area and delay savings compared to those previously presented.
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关键词
digital signal processing,residue number system,modulo arithmetic
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