65nm SoC向け混載SRAMでの動作マージン改善回路(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
siam international conference on data mining(2006)
Key words
cmos,sram
AI Read Science
Must-Reading Tree
Example
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined