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A Compact Model for Single-Poly Multitime Programmable Memory Cells

IEEE Transactions on Electron Devices(2016)

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摘要
A compact model for the single-poly multitime programmable (MTP) memory cells is presented in this paper for the first time. It is based on the charge balance approach, while the traditional old model is on the fixed capacitive coupling approach. The proposed cell model has been implemented by Verilog-A and integrated into commercial SPICE simulator. The model supports both dc and transient analys...
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关键词
Logic gates,Transistors,Mathematical model,Integrated circuit modeling,Computational modeling,Tunneling,Semiconductor device modeling
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