Integration challenges of new materials and device architectures for IC applications

Bichyen Nguyen,A Thean,Ted R White,A Vandooren,Marim Sadaka,Leo Mathew,Alexander L Barr,S G Thomas, Melissa Zalava,Da Zhang, Debby Eades,Zhonghai Shi,J Schaeffer,Dina H Triyoso,Sri Samavedam,Victor Vartanian, Tab Stephen, Brian J Goolsby,Stefan Zollner,Ran Liu, Ross Noble,T Nguyen, V Dhandapani, B Xie,X Wang,J Jiang,R Rai, Micheal Sadd, Micheal Ramon,S Kalpat, Lata Prabhu,V Kaushik,Yang Du,Thuy Dao, M Mendicino,Marius Orlowski,Phil Tobin, J Mogab,Suresh Venkatesan

2004 INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY（2004）

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摘要

In this paper, we will detail the issues with new materials being introduced into CMOS devices and present some potential solutions to enable high performance and low power CMOS for the 65nm node and beyond.

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关键词

cmos integrated circuits,mosfet,vlsi,capacitance,dielectric thin films,leakage currents,low-power electronics,nanoelectronics,silicon-on-insulator,work function,cmos devices,fdsoi,finfet,capacitance equivalent thickness,gate leakage,high performance cmos,high permittivity dielectric,low power cmos,metal gate electrodes,new materials,threshold voltage,low power electronics,electrodes,silicon on insulator,leakage current,dielectric materials,application specific integrated circuits,cmos technology

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