Multi-Gbit I/O and Interconnect Co-Design for Power Efficient Links
19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems（2010）
关键词
CMOS integrated circuits,integrated circuit design,integrated circuit interconnections,integrated circuit packaging,network routing,transceivers,C4 bump pattern,CMOS transceiver,I/O circuitry,LCP flex,bit rate 10 Gbit/s,bonded polyimide flex,high density interconnect,interconnect codesign,liquid crystal polymer,low-loss interconnect,microtwinax cable,multiGbit I/O,on-die transmission line routing,package-die interface,parallel links,power efficient links,signal-to-ground ratio,size 45 nm,top-of-the-package connector based interconnects,HDI,area array connectors,flex,micro-twinax cable,power efficient I/O,top of the package interconnects
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