The DLMT hardware implementation. A comparative study with the DCT and the DWT

Montreal, QC(2012)

引用 1|浏览14
暂无评分
摘要
In the last recent years, with the popularity of image compression techniques, many architectures have been proposed. Those have been generally based on the Forward and Inverse Discrete Cosine Transform (FDCT, IDCT). Alternatively, compression schemes based on discrete "wavelets" transform (DWT), used, both, in JPEG2000 coding standard and in H264-SVC (Scalable Video Coding) standard, do not need to divide the image into non-overlapping blocks or macroblocks. This paper discusses the DLMT (Discrete Lopez-Moreno Transform) hardware implementation. It proposes a new scheme intermediate between the DCT and the DWT, comparing results of the most relevant proposed architectures for benchmarking. The DLMT can also be applied over a whole image, but this does not involve increasing computational complexity. FPGA implementation results show that the proposed DLMT has significant performance benefits and improvements comparing with the DCT and the DWT and consequently it is very suitable for implementation on WSN (Wireless Sensor Network) applications.
更多
查看译文
关键词
computational complexity,data compression,discrete cosine transforms,discrete wavelet transforms,field programmable gate arrays,video coding,dlmt hardware implementation,fpga implementation,h264-svc standard,jpeg2000 coding standard,discrete lopez-moreno transform,discrete wavelets transform,forward discrete cosine transform,image compression,inverse discrete cosine transform,macroblocks,nonoverlapping blocks,scalable video coding
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要