3D Stackable 32nm High-K/Metal Gate SOI Embedded DRAM Prototype
VLSI Circuits（2011）
Key words
DRAM chips,copper,embedded systems,high-k dielectric thin films,silicon-on-insulator,three-dimensional integrated circuits,3D stackable high-k SOI embedded DRAM prototype,copper through-silicon vias,high performance embedded DRAM prototype,metal gate SOI embedded DRAM prototype,post through-via processing functional test,size 32 nm,3D,HKMG,TSV,eDRAM
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