A 16nm FinFET CMOS technology for mobile SoC and computing applications

Shienyang Wu, C Y Lin,M C Chiang,J J Liaw,J Y Cheng, S H Yang,Mongsong Liang, Tsuyoshi Miyashita,C H Tsai,B C Hsu, Takuya Yamamoto,Sandy Y Chang,V S Chang,J H Chen,H F Chen, K C Ting,Y K Wu, K H Pan, R F Tsui, C H Yao,P R Chang, H M Lien,T L Lee,Hyuck Mo Lee,Wenyao Chang,Tiansheuan Chang, Rui Chen,Meiling Yeh,C C Chen,Y H Chiu,Y H Chen,H C Huang,Y C Lu,C W Chang,M H Tsai,C C Liu,K S Chen, C C Kuo,H T Lin,S M Jang, Yuanan Ku

Electron Devices Meeting（2013）

引用 181|浏览8

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摘要

For the first time, we present a state-of-the-art energy-efficient 16nm technology integrated with FinFET transistors, 0.07um2 high density (HD) SRAM, Cu/low-k interconnect and high density MiM for mobile SoC and computing applications. This technology provides 2X logic density and >35% speed gain or >55% power reduction over our 28nm HK/MG planar technology. To our knowledge, this is the smallest fully functional 128Mb HD FinFET SRAM (with single fin) test-chip demonstrated with low Vccmin for 16nm node. Low leakage (SVt) FinFET transistors achieve excellent short channel control with DIBL of <;30 mV/V and superior Idsat of 520/525 uA/um at 0.75V and Ioff of 30 pA/um for NMOS and PMOS, respectively.

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关键词

cmos integrated circuits,mosfet,sram chips,copper,integrated circuit interconnections,system-on-chip,cu,cu-low-k interconnect,finfet cmos technology,finfet transistors,hd finfet sram,hk-mg planar technology,nmos,pmos,computing applications,high density mim,high density sram,logic density,mobile soc,short channel control,size 16 nm,storage capacity 128 mbit,system on chip

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