Integration of Amorphous and Crystalline as Gate Stack for Aggressively Scaled MOS Devices

Electron Device Letters, IEEE(2012)

Cited 11|Views3
No score
Abstract
Because of a higher permittivity than Al2O3, a large conduction band offset and high thermal stability, a thin amorphous Yb2O3 layer was integrated with a ZrTiO4 film as the gate stack for advanced Si MOS devices. With 800 °C annealing, the ZrTiO4 film can be crystallized in orthorhombic phase with permittivity of 45.9 and a gate stack with equivalent oxide thickness of 0.86 nm can be achieved. This crystalline ZrTiO4/Yb2O3 gate stack demonstrates negligible frequency dispersion in capacitance, low interface trap density of 1.86 × 1011 cm-2 eV-1, leakage current of 6.7 × 10-6 A/cm2 at gate bias of Hatband voltage (VFB) -1 V, and high extrapolated 10-year lifetime operating voltage of -2.9 V. These promising electrical characteristics suggest that the crystalline ZrTiO4/Yb2O3 gate stack holds great potential to be applied to aggressively scaled CMOS technology.
More
Translated text
Key words
cmos integrated circuits,mis devices,elemental semiconductors,silicon,titanium compounds,zirconium compounds,cmos technology,si,zrtio4-yb2o3,aggressively scaled mos devices,conduction band offset,electrical characteristics,gate stack,high thermal stability,leakage current,orthorhombic phase,size 0.86 nm,temperature 800 degc,thin amorphous layer,time 10 year,voltage -1 v,voltage -2.9 v,amorphous $hbox{yb}_{2}hbox{o}_{3}$,equivalent oxide thickness (eot),interface trap density,orthorhombic $hbox{zrtio}_{4}$,logic gates,dielectrics
AI Read Science
Must-Reading Tree
Example
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined