Solid State Bonding of Silicon Chips to Silver Buffer on Copper Substrates

Components, Packaging and Manufacturing Technology, IEEE Transactions(2012)

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Abstract
A solid state bonding technique was designed and developed to bond silicon (Si) chips to silver (Ag) buffer layer electroplated on copper (Cu) substrates at a temperature (260°C ) far below the melting temperature of Ag (961°C ). This is possible because Ag atoms in Ag buffer are brought in contact with the gold (Au) atoms in Au layer coated on Si chip. The close proximity in atomic scale allows the Ag and Au atoms to see each other, to share electrons and to bond to each other. The possibility of mating between Au and Ag surfaces relies on the deformation of Ag. Ag, with proper annealing, is ductile and has low yield strength. Its surface can thus deform to conform to and to follow the surface of Au layer coated on Si chip. Its ductile property can also help accommodate large mismatch in coefficient of thermal expansion between Si (2.7×10-6 °C-1) and Cu (17×10-6 °C-1). Ag also has the highest electrical and thermal conductivities among all metals. It is the dream bonding medium. The challenge is to bond Ag to other materials at a temperature compatible to electronic packaging processes, 260°C. In this research, Si chips are coated with thin chromium (Cr) and Au layers and then bonded to Ag buffer plated on Cu substrates. To make Ag buffer ductile, Ag buffer together with Cu substrate is annealed to increase its grain size by a factor of 25. The bonding was performed at 260°C with 1000 psi (6.89 MPa) static pressure. There is no molten phase involved in the bonding process. Scanning electron microscope evaluations show that on the revealed cross section no voids or gaps are observed on Si/Ag and Ag/Cu bonding interfaces. The bonded structure consists of only Si/Cr/Au/Ag/Cu and can sustain at high operating temperature due to high melting temperature of Ag.
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Key words
annealing,bonding processes,chromium,copper,electroplating,gold,silicon,silver,thermal conductivity,thermal expansion,thermal management (packaging),cu,cu-ag,si-cr-au,copper substrate,ductile property,electrical conductiviity,electronic packaging,gold atom,grain size,pressure 6.89 mpa,sanning electron microscope,silicon chip,silver buffer,solid state bonding,temperature 260 c,temperature 961 c,microstructure,silicon chips,coefficient of thermal expansion,yield strength,microstructures,cross section,scanning electron microscope,chip
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