Manufacturing and stacking of ultra-thin film packages

San Diego, CA(2009)

Cited 4|Views20
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Abstract
This paper discloses an ultra-thin and highly flexible package with embedded active chips. In this structure, there are no any supporting and permanent substrates needed. A 3 um copper foil with 18 um carrier layer was used as temporal substrate. The carrier layer will be removed after chip embedded process. After patterning and etching processes, the temporal copper foil became the bottom circuit that will connect with the other ultra-thin film package (UTFP). Ultra thin chips with around 15~20 mum thickness were assembled directly on the structured Cu foils in a flip-chip fashion. The structured Cu foils were patterned by laser to enhance the wettability with solder. The gap between chip and copper foil was only about 15 mum after the die bonding process. In order to fabricate the ultra thin chip, plasma dry etching was applied to release the stress induced during the grinding process and also made the chips' strength higher. The strength of ultra thin chip with and without plasma treatment was also compared. Subsequently, the chips were embedded into highly elastic polyurethane materials, with a copper foil always laminated on the top. The resultant UTFP has a thickness of less than 80 mum. The process details on ultra-thin wafer manufacturing, ultra-thin chip bonding, fine gap with underfill dispensing, thin chip lamination, laser drilling, laser patterning and stacking are also disclosed in this paper. The stacking process of UTFP is also a key technology in this paper. Because the stacking temperature is controlled below 150degC, anisotropic conductive film (ACF) material was used as the connecting medium. So far, the single UTFP has passed static bending test for 200 hours and dynamic bending test for 500 cycles under 5 mm bending curvature radius. In the future, the reliability tests which include TCT and TAST tests will be also executed, but not shown in this paper. The numerical simulation method will also be revealed to figure out the most critical point- during UTFP fabrication process and the stacking process.
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Key words
copper,electronics packaging,flexible electronics,flip-chip devices,integrated circuit reliability,laser beam machining,microassembling,numerical analysis,solders,thin films,wetting,utfp fabrication process,anisotropic conductive film,chip embedded process,copper foil,die bonding,elastic polyurethane materials,embedded active chips,flexible package,flip chip fashion,laser drilling,laser patterning,numerical simulation,plasma dry etching,plasma treatment,reliability tests,solder wettability,thin chip lamination,ultra thin chip bonding,ultra thin film packages,ultra thin wafer manufacturing,stacking,materials,thin film,packaging,flip chip,etching,lasers,critical point,testing,chip,manufacturing
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