A 24-Gb/s 27 - 1 Pseudo Random Bit Sequence Generator IC in 0.13 μm Bulk CMOS

Weiss, F.,Wohlmuth, H.-D.,Kehrer, D.,Scholtz, A.L.

Montreux（2006）

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摘要

This work presents a 24Gb/s pseudo random bit sequence (PRBS) generator with a sequence length of 27 - 1. The circuit uses an interleaved linear feedback shift register and multiplexing architecture. An output voltage swing of 280mVpp is achieved for 24Gb/s data rate and 390mVpp for 10Gb/s. The circuit features a trigger output which allows to trigger the eye or the sequence pattern. The circuit is manufactured in 0.13 mum bulk CMOS technology and draws 183 mA at 1.5 V supply voltage

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关键词

CMOS logic circuits,random number generation,shift registers,0.13 micron,1.5 V,10 Gbit/s,183 mA,24 Gbit/s,280 mV,390 mV,CMOS,integrated circuit,interleaved linear feedback shift register,multiplexing architecture,pseudo random bit sequence generator

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