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Progress and future directions of the US EUV lithography program

Shimane, Japan(2001)

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Abstract
Summary form only given. The US EUV Lithography Program has focused on demonstrating all critical technologies essential for early access to production tools. In addition to individual components, techniques, and metrologies, a major effort was completion of the alpha-like tool, the Engineering Test Stand (ETS). Progress to date is based on a close collaboration between technical staff at the Virtual National Laboratory, consisting of Sandia, Lawrence Livermore, and Lawrence Berkeley National Laboratories, member companies of the EUV Limited Liability Company (Intel, Motorola, AMD, Infineon, Micron and IBM), and a wide array of vendors and suppliers. In this paper, we review progress on aspheric optical substrates, multilayer coating reflectivity and uniformity, scattering and flare. We briefly describe requisite visible light and at-wavelength metrologies. Progress on EUV masks (reticles) is reported, including specifications, patterning with candidate materials, inspection, and standards. Progress on sources of EUV radiation is reported, and related to recently published wafer throughput models. Results of wafer exposures are presented for two sets of optics. Looking to the future, emphasis is placed on collaborative efforts and partnering directed towards early access to beta and production tools.
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aspherical optics,inspection,integrated circuit measurement,light scattering,photoresists,reflectivity,reticles,standards,ultraviolet lithography,euv limited liability company,euv lithography,euv masks,euv optics,euv radiation sources,engineering test stand,lawrence berkeley national laboratory,lawrence livermore national laboratory,sandia national laboratory,us euv lithography program,virtual national laboratory,aspheric optical substrates,at-wavelength metrologies,candidate materials,flare,metrologies,multilayer coating reflectivity,multilayer coating uniformity,production tools,scattering,specifications,visible light metrologies,wafer exposures,wafer throughput models,visible light,limited liability
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