Monolithic 3.3 V CCD/SOI-CMOS imager technology

Vyshnavi Suntharalingam,Brian E Burke,M D Cooper,D R W Yost, P W Gouker, Martin Anthony, Heather A Whittingham, James Sage, John Robert Burns,Steven Rabe, C K Chen,J M Knecht,Susan G Cann,Peter J Wyatt,Craig L Keast

San Francisco, CA, USA（2000）

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摘要

We have developed a merged CCD/SOI-CMOS technology that enables the fabrication of monolithic, low-power imaging systems on a chip. The CCD's, fabricated in the bulk handle wafer, have charge-transfer inefficiencies of about 1/spl times/10/sup -5/ and well capacities of more than 100,000 electrons with 3.3-V clocks and 8/spl times/8-/spl mu/m pixels. Fully depleted 0.35-/spl mu/m SOI-CMOS ring oscillators have stage delay of 48 ps at 3.3 V. We demonstrate for the first time an integrated image sensor with charge-domain A/D conversion and on-chip clocking.

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关键词

ccd image sensors,cmos image sensors,analogue-digital conversion,low-power electronics,silicon-on-insulator,0.35 micron,3.3 v,a/d conversion,charge transfer efficiency,delay,fully depleted soi-cmos ring oscillator,integrated image sensor,monolithic low-power ccd imager,on-chip clocking,low power electronics,chip,ring oscillator,silicon on insulator,image sensor

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