A voltage acceleration lifetime model to predict post-cycling LTDR characteristics of split-gate flash memories

L Hu,Anchi Kang,T I Wu,Eric Chen,J R Shih,H W Chin,Yaofeng Lin,Kenneth Wu,Yachin King

2005 IEEE International Reliability Physics Symposium, 2005 Proceedings 43rd Annual（2005）

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Abstract

in developing a fast test methodology to predict post-cycling low temperature data retention (LTDR) lifetime of split-gate flash memories, word-line stress is used to accelerate the charge gain effect in the trap-assist-tunneling (TAT) regime. By modeling the data retention behaviors under word-line stress conditions, lifetime tests can be completed successfully in a much shorter period, providing accurate lifetime prediction more efficiently for thicker gate oxide products.

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Key words

flash memories,integrated circuit testing,life testing,stress effects,charge gain effect,post-cycling low temperature data retention lifetime,split-gate flash memories,thicker gate oxide products,trap-assist-tunneling regime,voltage acceleration lifetime model,word-line stress,stress,weibull distribution,predictive models,acceleration,voltage,tunneling

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