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"Extreme Edge Engineering" - 2 Mm Edge Exclusion Challenges and Cost-Effective Solutions for Yield Enhancement in High Volume Manufacturing for 200 and 300 Mm Wafer Fabs

T Tran,W Roberts,J Tiffany,I Jekauc, N Clements,P Jowett,R Ferguson,D Mattson, C Demmert,M Richmond, C Wiendl, M Bruno, A Brock, T Taylor

2004 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE AND WORKSHOP ADVANCING THE SCIENCE AND TECHNOLOGY OF SEMICONDUCTOR MANUFACTURING EXCELLENCE(2004)

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关键词
chemical mechanical polishing,etching,integrated circuit yield,lithography,wafer bonding,chemical mechanical polishing,cost effective solutions,etch nonuniformity,extreme edge engineering,former edge most region,image displacement,interlayer misalignment,lithography edge coating,lithography edge patterning,pattern density dependent CMP,plasma etch induced blocked pattern,plasma etch induced distorted pattern,scribe readability,shared driver shorts,wafer edge exclusion,wafer fabs,yield enhancement
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