Applying a submicron mismatch model to practical IC design
San Diego, CA（1994）
Abstract
A model of the mismatch effect in IC devices is presented that extends the validity of existing models to the sub-micron region. Unlike in previous studies the effect of a finite two dimensional correlation length is taken into account, thus allowing a good reproduction of the differences in device variance that occur for different aspect ratios. The model has been characterized on a 0.75 μ CMOS technology and has been implemented in a powerful CAD system for statistical design analysis, thus being of practical utility for IC designers when making critical design considerations and trade-offs
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Key words
cmos integrated circuits,circuit cad,integrated circuit design,integrated circuit modelling,statistical analysis,0.75 micron,cad system,cmos technology,ic design,aspect ratios,device variance,finite two dimensional correlation length,statistical design analysis,submicron mismatch model,submicron region,aspect ratio,application specific integrated circuits,predictive models,semiconductor device modeling,microelectronics,design automation,stochastic processes
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