Error detection and calibration for Time-Interleaved ADCs
General Assembly and Scientific Symposium(2014)
Abstract
To meet the requirement of high sampling rate and high resolution in a sampling system, a time-interleaved ADCs system is a good option. However there are several mismatches such as timing mismatch, gain mismatch and offset mismatch which make the performance of time-interleaved ADCs system deteriorate sharply. In the paper a new error detection method is proposed for estimating the error values. And a genius calibration algorithm is raised at the same time which is very simple in structure and easy to be implemented on FPGA with little resources. The scheme has been simulated in MATLAB with real data sampled by ADC. And the simulation results obviously indicate that the errors are eliminated effectively and the performance of ADCs system is greatly improved as well.
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Key words
analogue-digital conversion,error detection,field programmable gate arrays,fpga,matlab,error detection method,error value estimation,genius calibration algorithm,time-interleaved adcs,gain mismatch,interleaved adcs,offset mismatch,timing mismatch
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