An Enhanced 16nm Cmos Technology Featuring 2nd Generation Finfet Transistors and Advanced Cu/Low-K Interconnect for Low Power and High Performance Applications

Shien-Yang Wu,C. Y. Lin, M. G. Chiang,J. J. Liaw,J. Y. Cheng,S. H. Yang, S. Z. Chang,M. Liang,T. Miyashita,C. H. Tsai,C. H. Chang,V. S. Chang, Y. K. Wu,J. H. Chen,H. F. Chen, S. Y. Chang,K. H. Pan,R. F. Tsui,C. H. Yao,K. C. Ting, T. Yamamoto,H. T. Huang,T. L. Lee,C. H. Lee,W. Chang,H. M. Lee,C. C. Chen,T. Chang,R. Chen,Y. H. Chiu,M. H. Tsai,S. M. Jang,K. S. Chen,Y. Ku

2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)（2014）

Cited 45|Views19

Key words

CMOS integrated circuits,MOSFET,SRAM chips,copper,integrated circuit reliability,low-k dielectric thin films,Cu,HD SRAM Vccmin capability,advanced Cu-low-k interconnect,advanced interconnect scheme,device overdrive capability,dynamic power saving,enhanced 16nm CMOS technology,high density SRAM Vccmin capability,metal capacitance reduction,reliability enhancement,second generation FinFET transistors,size 16 nm,variability reduction

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