A New Approach for Trap Analysis of Vertical NAND Flash Cell Using RTN Characteristics

Daewoong Kang,Changsub Lee,Sunghoi Hur,Duheon Song,Jeong-Hyuk Choi

2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)（2014）

引用 12|浏览3

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摘要

We introduce new phenomena that show turn-on at back-side for Vertical NAND (V-NAND) with back-insulator and propose a new method to analyze the trap of back-interface related to the phenomena. Back-side traps have been analyzed with the back-gate structure [1]. However, V-NAND has no back-gate structure, so it's difficult to observe traps. With RTN method we proposed, it's possible for us to observe back-side traps.

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关键词

NAND circuits,flash memories,integrated circuit modelling,noise measurement,RTN characteristics,RTN method,V-NAND,back-gate structure,back-insulator,back-interface,back-side traps,random telegraph noise,trap analysis,vertical NAND flash cell

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