An output capacitorless low-dropout regulator based on flipped voltage follower
Solid-State and Integrated Circuit Technology（2014）
摘要
An output capacitor-less low-dropout (LDO) regulator based on flipped voltage follower (FVF) for system-on-chip (SoC) application is presented. With a common-gate amplifier and two-pole system, it evidently simplifies the architecture of the LDO regulator and achieves the stability more easily. Implemented in SMIC 55nm CMOS, the proposed LDO regulator only consumes 15 μA net current from 1.5V power supply, with a minimum dropout voltage of 200 mV. With 16pF total compensation capacitance, it can provide 0-30mA load current with a load capacitance range of 0-300pF.
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关键词
cmos integrated circuits,circuit stability,operational amplifiers,system-on-chip,fvf,ldo,smic cmos technology,soc application,capacitance 0 pf to 300 pf,common-gate amplifier,compensation capacitance,current 0 ma to 30 ma,current 15 mua,flipped voltage follower,output capacitorless low-dropout regulator,size 55 nm,system-on-chip application,two-pole system,voltage 1.5 v,voltage 200 mv
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