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A highly integrated biomedical multiprocessor SoC design for a wireless bedside monitoring system

ISCAS(2014)

Cited 6|Views3
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Abstract
This paper presents a highly integrated multiprocessor system-on-chip (SoC) design, enabling real-time processing of multi-biomedical signals in a wireless bedside monitoring system. This system includes a real-time online recursive independent component analysis (ORICA) processor to automatically remove brain electroencephalogram (EEG) artifacts signals, a heart rate variability (HRV) analysis processor for monitoring electrocardiogram (ECG) signals, and a basic biomedical signal processor for monitoring common physiological data such as oxygen saturation, blood pressure, or body temperature. The multiprocessor chip is fabricated using TSMC 90 nm CMOS technology, and occupies a core area of 1,600 × 1,600 um2. Simulated power consumption is 15.89 mW under the conditions of 1.0V core supply voltage and 64 MHz clock operation frequency.
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Key words
electrocardiography,cmos integrated circuits,brain electroencephalogram artifacts signals,power 15.89 mw,orica processor,electroencephalography,real-time online recursive independent component analysis processor,heart rate variability analysis processor,highly integrated multiprocessor system-on-chip design,independent component analysis,physiological data monitoring,system-on-chip,multiprocessing systems,hrv analysis processor,electrocardiogram signals,size 90 nm,tsmc 90 nm cmos technology,basic biomedical signal processor,highly integrated multiprocessor soc design,ecg signals,frequency 64 mhz,brain eeg artifacts signals,real-time processing,multibiomedical signals,wireless bedside monitoring system,voltage 1.0 v,wireless communication,engines,system on chip,wireless sensor networks,heart rate variability,real time processing
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