Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models

IEEE Design & Test(2015)

引用 17|浏览46
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摘要
This paper presents statistical methods to identify and take advantage of correlations in the test methods and wafer-level spatial correlations among devices. The result, shown for industrial designs, is a far more optimized test suite.
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关键词
intra-die correlation,statistical methods,integrated circuit testing,joint correlation model,analog-rfic testing,analogue integrated circuits,spatial correlation modeling,radiofrequency integrated circuits,wafer-level spatial correlations,inter-die correlation,industrial designs,adaptive test,alternate test,analog and rf test,analog circuits,statistical analysis,radio frequency,system on chip,computational modeling,semiconductor device modeling
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