4.1 22nm Next-generation IBM System Z Microprocessor
2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers（2015）
关键词
CMOS integrated circuits,DRAM chips,cache storage,clocks,microcontrollers,multiprocessing systems,multiprocessor interconnection networks,performance evaluation,system buses,CP chip,I/O bus controller,IBM high-performance high-κ CMOS SOI technology,L4 cache chip,PCIe Gen3 interfaces,SC chip,XBUS,clock frequency,eDRAM L3 cache,eDRAM L4 cache,eDRAM L4 directory,electrical design innovations,high-frequency processor cores,interface IO,interprocessor management,logical design innovations,maximum system capacity,memory interfaces,memory size 18 MByte,memory size 480 MByte,memory size 64 MByte,metal interconnect,microprocessor chip,multiprocessor cache control-coherency logic,next-generation IBM System z microprocessor,physical design innovations,size 22 nm,system controller chip,system-level communications,transistors,zEC12 design
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