Managing Laser Power in Silicon-Photonic NoC through Cache and NoC Reconfiguration

In manycore systems, the silicon-photonic link technology is projected to replace electrical link technology for global communication in network-on-chip (NoC) as it can provide as much as an order of magnitude higher bandwidth density and lower data-dependent power. However, a large amount of fixed power is dissipated in the laser sources required to drive these silicon-photonic links, which negates any bandwidth density advantages. This large laser power dissipation depends on the number of on-chip silicon-photonic links, the bandwidth of each link and the photonic losses along each link. In this paper, we propose to reduce the laser power dissipation at run time by dynamically activating/deactivating L2 cache banks and switching ON/OFF the corresponding silicon-photonic links in the NoC. This method effectively throttles the total on-chip NoC bandwidth at run time according to the memory access features of the applications running on the manycore system. Full-system simulation utilizing PARSEC and SPLASH-2 parallel benchmarks reveal that our proposed technique achieves on an average 23.8% (peak value 74.3%) savings in laser power and 9.2% (peak value 26.9%) lower energy-delay product (EDP) for the whole system at the cost of 0.65% loss (peak value 2.6%)in IPC on average when compared to the cases where all L2 cache banks are always active.