80dB dynamic range ∑δ modulator for low-IF GSM receivers

A high-resolution, 200 kHz signal bandwidth, third-order single-loop single-bit 2A modulator used in low-IF GSM receivers is presented. The modulator is implemented with fully differential switched capacitor circuits in standard 0.6 μm 2P2M CMOS technology. The modulator uses two balanced reference voltages of ±1V, and is driven by a single 26 MHz clock signal. The measurement results show that, with an oversampling ratio of 64, the modulator achieves an 80.6 dB dynamic range, a 71.8 dB peak SNDR, and a 73.9 dB peak SNR in the signal bandwidth of 200kHz. The modulator dissipates 15mW static power from a single 5V supply.