Settling State Optimization For Folded-Cascode Ota With A Novel Compensation Strategy

In the light of step-response analysis of the second order system and the Minimum-settling-time (MST) theory, new Clock feedthrough frequency compensation (CFFC) strategy for the Folded -Cascode OTA is proposed. Cadence simulation with 0.35 mu m AMS Si CMOS models shows the settling time of the compensated OTA is reduced by 22.7% when the circuit is in the Fast-Settling state. As the capacitor load varies from 0.5pF to 2.5pF, the improved settling time increases approximately linearly from 3.62ns to 4.46ns, and the circuit achieves fast settling at every load value. This method can be applied to active Switched capacitor (SC) networks and its related fields.